A word is retrieved based on a portion of its contents
Location
·
Refers to whether
memory is internal and external to the computer.
- internal memory, processor - registers - main memory - cache
- external memory consist of peripheral storage devices like disk and tape.
Capacity
·
Memory is typically expressed
in terms of bytes
Unit of transfer
·
For internal memory
the unit of transfer is equal to the number of electrical lines into and out of
the memory module
How do the terms word, addressable unit, and
unit of transfer relate to internal memory?
• Word: The "natural" unit of organization of memory.
The size of a word is typically equal to the number of bits used to represent
an integer and to the instruction length.
• Addressable units: In some systems, the addressable unit is the word.
However, many systems allow addressing at the byte level. In any case, 2A = N.
• Unit of transfer: For main memory, this is the number of bits read out of or
written into memory at a time. The unit of transfer need not equal a word or an
addressable unit.
Methods of accessing units of data
- Sequential access
- Direct access
- Random access
- Associative access
Sequential access
- Memory is organized into units of data, called records
- access must be made in a linear sequence
- access time is variable
direct access
- involves a shared read-write mechanism
- individual blocks or records have a unique address based on physical location
- access time is variable
random access
- each addressable location in memory has a unique, physically
wired-in addressing mechanism
- The time to access a given location is independent of the sequence of prior
accesses and is constant
- Any location can be selected at random and directly addressed and accessed
- main memory
associative
- A word is retrieved based on a portion of its contents rather
than its address
- Each location has its own addressing mechanism and retrieval time is constant
independent of location or prior access patterns
performance parameters
- access time (latency)
- memory cycle time
- transfer rate
access time (latency)
- For random-access memory it is the time it takes to perform a
read or write operation
- For non-random-access memory it is the time it takes to position the
read-write mechanism at the desired location
memory cycle time
- Access time plus any additional time required before second
access can commence
transfer rate
- The rate at which data can be transferred into or out of a
memory unit
- For random-access memory it is equal to 1/(cycle time)
physical types of memory
- Semiconductor memory
- Magnetic surface memory
- Optical
- Magneto-optical
physical characteristics
- volatile / erasable
- nonvolatile / nonerasable
Volatile memory
·
Information decays
naturally or is lost when electrical power is switched off
Nonvolatile memory
- Once recorded, information remains without deterioration until
deliberately changed
- No electrical power is needed to retain information
Magnetic-surface memories
·
Are nonvolatile
Semiconductor memory
·
May be either volatile
or nonvolatile
Nonerasable memory
- Cannot be altered, except by destroying the storage unit
- Semiconductor memory of this type is known as read-only memory (ROM)
Organization
·
refers to the physical
arrangement of bits to form words
There is a trade-off among capacity, access time,
and cost
- Faster access time, greater cost per bit
- Greater capacity, smaller cost per bit
- Greater capacity, slower access time
Disk cache
·
A portion of main
memory can be used as a buffer to hold data temporarily that is to be read out
to disk
Virtual memory
·
Facility that allows
programs to address memory from a logical point of view, without regard to the
amount of main memory physically available
Mapping Function
·
Because there are
fewer cache lines than main memory blocks, an algorithm is needed for mapping
main memory blocks into cache lines
Direct mapping
·
Maps each block of
main memory into only one possible cache line
Associative mapping
·
Permits each main
memory block to be loaded into any line of the cache
set-associative mapping
·
A compromise that
exhibits the strengths of both the direct and associative approaches while
reducing their disadvantages
Victim Cache
- Originally proposed as an approach to reduce the conflict misses
of direct mapped caches without affecting its fast access time
- Fully associative cache
The most common replacement algorithms are:
- Least recently used (LRU)
- First-in-first-out (FIFO)
- Least frequently used (LFU)
Least recently used (LRU)
- Replace that block in the set that has been in the cache longest
with no reference to it
First-in-first-out (FIFO)
- Replace that block in the set that has been in the cache longest
Least frequently used (LFU)
- Replace that block in the set that has experienced the fewest
references
Write through
·
All write operations
are made to main memory as well as to the cache
Write back
- Minimizes memory writes
- Updates are made only in the cache
multilevel cache
·
As logic density has
increased it has become possible to have a cache on the same chip as the
processor
split cache
·
split the cache into
two :
- One dedicated to instructions
- One dedicated to data,
Both exist at the same level